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MICROELECTRONICS, MICROSYSTEMS AND NANOTECHNOLOGY
Papers Presented at MMN 2000

Athens, Greece, 20 - 22 November 2000


CONTENTS

FRONT MATTER
i
Nanotechnology and Quantum Devices
A NEW STRATEGY FOR IN SITU SYNTHESIS OF OLIGONUCLEOTIDES ARRAYS FOR DNA CHIP TECHNOLOGY
F. VINET, A. HOANG, F. MITTLER and C. ROSILIO
3
MAGNETOTRANSPORT PROPERTIES OF LA-CA-MN-O MULTILAYERS
C. CHRISTIDES
13
A NOVEL METHOD FOR THE CALCULATION OF THE LOCAL ELECTRIC FIELD AT THE EMITTING SURFACE OF A CARBON SINGLE-WALL NANOTUBE
G. C. KOKKORAKIS, A. MODINOS and J. P. XANTHAKIS
17
STUDY OF PHOTOLUMINESCENCE AND MICRO-PHOTOLUMINESCENCE OF V-SHAPED QUANTUM WIRES
M. TSETSERI, G. P. TRIBERIS, V. VOLIOTIS and R. GROUSSON
21
CATALYTIC ACTION OF NI ATOMS IN THE FORMATION OF CARBON NANOTUBES: A COMBINED AB-INITIO AND MOLECULAR DYNAMICS STUDY
ANTONIS ANDRIOTIS, MADHU MENON and GEORGE FROUDAKIS
25
Si NANOCRYSTAL MOS MEMORY OBTAINED BY LOW-ENERGY ION BEAM SYNTHESIS
E. KAPETANAKIS, P. NORMAND, D. TSOUKALAS, K. BELTSIOS, S. ZHANG, J. VAN DEN BERG and J. STOEMENOS
29
CHARGE EFFECTS AND RELATED TRANSPORT PHENOMENA IN NANOSIZE SILICON/INSULATOR STRUCTURES
J. A. BERASHEVICH, A. L. DANILYUK, A. N. KHOLOD, F. ARNAUD D'AVITAYA and V. E. BORISENKO
33
RADIATIVE RECOMBINATION FROM SILICON QUANTUM DOTS IN Si/SiO2 SUPERLATTICES
P. PHOTOPOULOS, T. OUISSE, D. N. KOUVATSOS and A. G. NASSIOPOULOU
37
AVALANCHE POROUS SILICON LIGHT EMITTING DIODES FOR OPTICAL INTRA-CHIP INTERCONNECTS
S. K. LAZAROUK, P. V. JAGUIRO, A. A. LESHOK and V. E. BORISENKO
41
INFRARED ABSORPTION IN STRAINED Si/Si1-xGex/Si QUANTUM WELLS
G. HIONIS and G. P. TRIBERIS
45
THERMOPOWER CALCULATIONS AT FILLING FACTOR 3/2 AND 1/2 FOR TWO-DIMENSIONAL SYSTEMS
V. C. KARAVOLAS and G. P. TRIBERIS
49
THERMOELECTRIC PROPERTIES OF COMPOSITE FERMIONS
M. TSAOUSIDOU and G. P. TRIBERIS
53
DESIGN AND FABRICATION OF SUPPORTED-METAL CATALYSTS THROUGH NANOTECHNOLOGY
I. ZUBURTIKUDIS
57
CALCULATED SPONTANEOUS EMISSION RATES IN SILICON QUANTUM WIRES GROWN IN {100} PLANE
X. ZIANNI and A. G. NASSIOPOULOU
61
ELECTRICAL MODELING AND CHARACTERIZATION OF Si/SiO2 SUPERLATTICES
T. OUISSE, A. G. NASSIOPOULOU and D. N. KOUVATSOS
65
Ge/SiO2 THIN LAYERS THROUGH LOW-ENERGY Ge+ IMPLANTATION AND ANNEALING: NANOSTRUCTURE EVOLUTION AND ELECTRICAL CHARACTERISTICS
K. BELTSIOS, P. NORMAND, E. KAPETANAKIS, D. TSOUKALAS, A. TRAVLOS, J. GAUTIER, F. JOURDAN and P. HOLLIGER
69
VERTICAL TRANSPORT MECHANISMS IN nc-Si/CaF2 MULTI-LAYERS
V. IOANNOU-SOUGLERIDIS, A. G. NASSIOPOULOU, F. BASSANI and F. ARNAUD D'AVITAYA
73
PHOTO- AND ELECTROLUMINESCENCE FROM nc-Si/CaF2 SUPERLATTICES
V. IOANNOU-SOUGLERIDIS, T. OUISSE, A. G. NASSIOPOULOU, F. BASSANI and F. ARNAUD D'AVITAYA
77
AB INITIO CALCULATION OF THE OPTICAL GAP IN SMALL SILICON NANOPARTICLES
C. S. GAROUFALIS and ARISTIDES D. ZDETSIS
81
GROUND STATE ELECTRONIC STRUCTURE OF SMALL SI QUANTUM DOTS
C. S. GAROUFALIS, ARISTIDES D. ZDETSIS and J. P. XANTHAKIS
85
Processing
TECHNOLOGY ROADMAP CHALLENGES FOR DEEP SUBMICRON CMOS
C. L. CLAEYS and H. E. MAES
91
PHOTOLITHOGRAPHIC MATERIALS FOR NOVEL BIOCOMPATIBLE LIFT OFF PROCESSES
A. DOUVAS, C. D. DIAKOUMAKOS, P. ARGITIS, K. MISIAKOS, D. DIMOTIKALI, C. MASTIHIADIS and S. KAKABAKOS
103
POLYCRYSTALLINE SILICON THIN FILM TRANSISTORS HAVING GATE OXIDES DEPOSITED USING TEOS
V. EM. VAMVAKAS, D. N. KOUVATSOS and D. DAVAZOGLOU
107
SOLID INTERFACE STUDIES WITH APPLICATIONS IN MICROELECTRONICS
S. KENNOU, S. LADAS, A. SIOKOU, I. DONTAS and V. PAPAEFTHIMIOU
111
A COMPARISON BETWEEN POINT DEFECT INJECTING PROCESSES IN SILICON USING EXTENDED DEFECTS AND DOPANT MARKER LAYERS AS POINT DEFECT DETECTORS
D. SKARLATOS, D. TSOUKALAS, C. TSAMIS, M. OMRI, L. F. GILES, A. CLAVERIE and J. STOEMENOS
115
RAPID THERMAL ANNEALING OF ARSENIC IMPLANTED SILICON FOR THE FORMATION OF ULTRA SHALLOW N+P JUNCTIONS
N. GEORGOULAS, D. GIRGINOUDI, A. MITSINAKIS, M. KOTSANI and A. THANAILAKIS
119
SIMULATION OF THE FORMATION AND CHARACTERIZATION OF ROUGHNESS IN PHOTORESISTS
G. P. PATSIS, V. CONSTANTOUDIS and E. GOGOLIDES
123
F2 LASER (157 nm) LITHOGRAPHY: MATERIALS AND PROCESSES
E. TEGOU, E. GOGOLIDES, P. ARGITIS, C. D. DIAKOUMAKOS, A. TSEREPI, A. C. CEFALAS, E. SARANTOPOULOU, J. CASHMORE and P. GRUNEWALD
127
FABRICATION OF FINE COPPER LINES ON SILICON SUBSTRATES PATTERNED WITH AZ 5214™ PHOTORESIST VIA SELECTIVE CHEMICAL VAPOR DEPOSITION
D. DAVAZOGLOU, S. VIDAL and A. GLEIZES
131
INVESTIGATION OF THE NITRIDATION OF Al2O3 (0001) SUBSTRATES BY A NITROGEN RADIO FREQUENCY PLASMA SOURCE
S. MIKROULIS, V. CIMALLA, A. KOSTOPOULOS, G. CONSTANDINIDIS, G. DRAKAKIS, M. ZERVOS, M. CENGHER and A. GEORGAKILAS
135
SIMULATION OF SI AND SIO2 FEATURE ETCHING IN FLUOROCARBON PLASMAS
GEORGE KOKKORIS, EVANGELOS GOGOLIDES and ANDREAS G. BOUDOUVIS
139
EPITAXIAL ErSi2 ON STRAINED AND RELAXED Si1-xGex
G. APOSTOLOPOULOS, N. BOUKOS, P. PAPANDREOPOULOS and A. TRAVLOS
143
DEVELOPMENT OF A NEW LOW ENERGY ELECTRON BEAM LITHOGRAPHY SIMULATION TOOL
D. VELESSIOTIS, X. ZIANNI, N. GLEZOS and K. N. TROHIDOU
147
CMOS Devices and Devices Based on Compound Semiconductors
ADVANCED SOI DEVICE ARCHITECTURES FOR CMOS ULSI
F. BALESTRA
153
RECENT DEVELOPMENTS AND RELIABILITY OF POLYCRYSTALLINE SILICON THIN FILM TRANSISTORS
C. A. DIMITRIADIS, J. STOEMENOS, F. V. FARMAKIS, J. BRINI and G. KAMARINOS
167
DIFFERENT TYPES OF SINGLE CRYSTALLINE GALLIUM NITRIDE THIN FILMS GROWN DIRECTLY ON VICINAL (001) GALLIUM ARSENIDE SUBSTRATES
A. GEORGAKILAS, K. AMIMER, M. ANDROULIDAKI, K. TSAGARAKI, B. PECZ, L. TOTH and M. CALAMIOTOU
171
EPITAXIAL Y2O3 ON Si (001) BY MBE FOR HIGH-k GATE DIELECTRIC APPLICATIONS
G. VELLIANITIS, A. DIMOULAS and A. TRAVLOS
175
PERFORMANCE OF GaAs/AlGaAs LASER DIODES FABRICATED BY EPITAXIAL MATERIAL WITH SIGNIFICANTLY DIFFERENT NUMBERS OF QUANTUM WELLS
D. CENGHER, G. DELIGEORGIS, E. APERATHITIS, M. SFENDOURAKIS, G. HALKIAS, Z. HATZOPOULOS and A. GEORGAKILAS
179
MICROHARDNESS CHARACTERIZATION OF EPITAXIALLY GROWN GaN FILMS: EFFECT OF LIGHT ION IMPLANTATION
P. KAVOURAS, M. KATSIKINI, Ph. KOMNINOU, E. C. PALOURA, J. G. ANTONOPOULOS and Th. KARAKOSTAS
183
MULTIPLE QUANTUM WELL SOLAR CELLS UNDER AM1 AND CONCENTRATED SUNLIGHT
E. APERATHITIS, Z. HATZOPOULOS, M. KAYAMBAKI, V. FOUKARAKI, M. RUŽINSKÝ, V. ŠÁLY, P. SIROTNÝ and P. PANAYOTATOS
187
PROCESSING WITH IN SITU DIAGNOSTIC TECHNIQUES FOR THE INTEGRATION OF GaAs-BASED OPTO-ELECTRONIC DEVICES BONDED ON Si C-MOS WAFERS
G. DELIGEORGIS, E. APERATHITIS, D. CENGHER, Z. HATZOPOULOS and A. GEORGAKILAS
193
INVESTIGATION OF DIFFERENT Si(111) SUBSTRATE PREPARATION METHODS FOR THE GROWTH OF GaN BY RF PLASMA-ASSISTED MOLECULAR BEAM EPITAXY
M. Androulidaki, K. Amimer, K. Tsagaraki, M. Zervos, G. Constantinidis, Z. Hatzopoulos, A. Georgakilas, F. Peiro and A. Cornet
197
MATERIAL PROPERTIES OF GaN FILMS WITH Ga- OR N- FACE POLARITY GROWN BY MBE ON Al2O3 (0001) SUBSTRATES UNDER DIFFERENT GROWTH CONDITIONS
A. KOSTOPOULOS, S. MIKROULIS, E. DIMAKIS, E.-M. PAVELESCU, M. ANDROULIDAKI, K. TSAGARAKI, G. CONSTANTINIDIS, A. GEORGAKILAS, PH. KOMNINOU, TH. KEHAGIAS and TH. KARAKOSTAS
201
THE INFLUENCE OF SILICON INTERSTITIAL CLUSTERING ON THE REVERSE SHORT CHANNEL EFFECT
C. TSAMIS and D. TSOUKALAS
205
NOISE MODELING OF INTERDIGITATED GATE CMOS DEVICES
E. F. TSAKAS and A. N. BIRBAS
209
SUBTHRESHOLD CHARACTERISTICS OF 0.15µm SOI-MOSFETs AFTER HOT-CARRIER STRESS
P. DIMITRAKIS, G. J. PAPAIOANNOU, J. JOMAAH and F. BALESTRA
213
A LOW VOLTAGE BIAS TECHNIQUE TO INCREASE SENSITIVITY OF MOSFETS DOSIMETERS
G. FIKOS, S. SISKOS, A. CHATZIGIANNAKI and G. SARRABAYROUSE
217
HIGH PRECISION CMOS EUCLIDEAN DISTANCE COMPUTING CIRCUIT
G. FIKOS and S. SISKOS
221
Microsystems
PRESSURE SENSORS BASED ON 3C-SiC ON Si-ON-INSULATOR FOR HIGH TEMPERATURE APPLICATIONS
S. ZAPPE, M. EICKHOFF and J. STOEMENOS
227
MICROMACHINED L.T.GAAS/ALGAAS MEMBRANES AS SUPPORT FOR 38 GHZ AND 77 GHZ FILTERS
G. DELIGEORGIS, M. LAGADAS, G. KONSTANTINIDIS, N. KORNILIOS, A. MÜLLER, S. IORDANESCU, I. PETRINI, D. VASILACHE and P. BLONDY
234
ALTERNATIVE SIGNAL EXTRACTION TECHNIQUE FOR MINIATURE FLUXGATES
P. D. DIMITROPOULOS and J. N. AVARITSIOTIS
238
INTEGRATED GAS FLOW SENSOR FABRICATED BY POROUS SILICON TECHNOLOGY
G. KALTSAS and A. G. NASSIOPOULOU
242
LINEAR ARRAYS OF POLY SI-GE UNCOOLED MICROBOLOMETERS WITH CMOS READOUT AS LONG WAVELENGTH INFRARED SENSORS
SPYROS KAVADIAS, PET DE MOOR, MARTIN GASTAL and CHRIS VAN HOOF
246
SILICON CAPACITIVE PRESSURE SENSORS AND PRESSURE SWITCHES FABRICATED USING SILICON FUSION BONDING
S. KOLIOPOULOU, D. GOUSTOURIDIS, S. CHATZANDROULIS and D. TSOUKALAS
250
LOW-POWER SILICON MICROHEATERS ON A THIN DIELECTRIC MEMBRANE WITH THICK-FILM SENSING LAYER FOR GAS SENSOR APPLICATIONS
V. GUARNIERI, S. BRIDA, B. MARGESIN, F. GIACOMOZZI, M. ZEN, A. A. VASILIEV, A. V. PISLIAKOV, G. SONCINI, G. PIGNATEL, D. VINCENZI, M. A. BUTTURI, M. STEFANCICH, M. C. CAROTTA and G. MARTINELLI
254
MICROSYSTEMS FOR ACOUSTICAL SIGNAL DETECTION APPLICATIONS
D. K. FRAGOULIS and J. N. AVARITSIOTIS
259
CAPILLARY FORMAT BIOANALYTICAL MICROSYSTEMS
K. MISIAKOS, C. MASTICHIADIS and S. E. KAKABAKOS
263
ULTRATHIN NANOPOROUS AND MICROPOROUS SIO2 COATINGS FOR GAS/VAPOR SEPARATION AND SENSOR APPLICATIONS
K. BELTSIOS, N. KANELLOPOULOS, E. SOTERAKOU and G. TSANGARIS
267
STRUCTURE CONTROL OF MICROPOROUS CARBON COATINGS FOR GAS/VAPOR SEPARATION AND SENSOR APPLICATIONS
K. BELTSIOS, G. PILATOS, F. KATSAROS, N. KANELLOPOULOS and A. ANDREOPOULOS
271
2-D SIMULATION OF ON-CHIP BAW RESONATORS
E. D. TSAMIS and J. N. AVARITSIOTIS
275
THEORETICAL CALCULATION OF THE X-RAY PHOTON DETECTOR RESPONSE FABRICATED ON SI GALLIUM ARSENIDE
V. G. THEONAS, P. DMITRAKIS and G. PAPAIOANNOU
279
EFFECTIVENESS OF LOCAL THERMAL ISOLATION BY POROUS SILICON IN A SILICON THERMAL SENSOR
D. N. PAGONIS, C. TSAMIS, G. KALTSAS and A. G. NASSIOPOULOU
283
THERMAL CONDUCTIVITY OF POROUS SILICON LAYERS PROBED BY MICRO-RAMAN SPECTROSCOPY
D. PAPADIMITRIOU, P. TASSIS, L. TSOURA, C. TSAMIS and A. G. NASSIOPOULOU
287
Silicon Integrated Technology and Integrated Circuit Design
A MCM-L BOARD FOR THE BASEBAND PROCESSOR OF A DUAL MODE WIRELESS TERMINAL
C. DROSOS, C. DRE, K. POTAMIANOS and S. BLIONAS
293
A CAD TOOL FOR AUTOMATIC GENERATION OF RNS & QRNS CONVERTERS
M. M. DASIGENIS, D. J. SOUDRIS, S. K. VASILOPOULOU and A. T. THANAILAKIS
297
MOSFET MODEL BENCHMARKING USING A NOVEL CAD TOOL
NIKOLAOS A. NASTOS and YANNIS PAPANANOS
301
AN HBT-BICMOS LASER DRIVER WITH INDEPENDENTLY ADJUSTABLE DC AND MODULATION CURRENTS FOR HIGH SPEED OPTICAL INTERCONNECTIONS
P. ROBOGIANNAKIS, S. G. KATSAFOUROS, E. D. KYRIAKIS-BITZAROS, N. HARALABIDIS and G. HALKIAS
305
ON THE DESIGN OF A LOW POWER MODULATOR/DEMODULATOR FOR DECT/GSM
C. DROSOS, C. DRE, S. BLIONAS, D. SOUDRIS and G. KALIVAS
309
BLUETOOTH ENCRYPTION/DECRYPTION ALGORITHM ARCHITECTURE AND IMPLEMENTATION
PARASKEVAS KITSOS and ODYSSEAS KOUFOPAVLOU
313
PASSIVE ELEMENT DESIGN ISSUES FOR FULLY INTEGRATED RF VCOs
ARISTIDES KYRANAS and YANNIS PAPANANOS
317
POWER AMPLIFIER LINEARISATION TECHNIQUES: AN OVERVIEW
NIKOS NASKAS and YANNIS PAPANANOS
321
LOW-POWER IMPLEMENTATION OF AN ENCRYPTION/DECRYPTION SYSTEM WITH ASYNCHRONOUS TECHNIQUES
NIKOS SKLAVOS and ODYSSEAS KOUFOPAVLOU
325
A 0.25µm CMOS FAST CURRENT AMPLIFIER WITH LEAKAGE CURRENT COMPENSATION FOR SOLID STATE DETECTOR APPLICATIONS
Emmanuel Zervakis and Nikos Haralabidis
329
DESIGN AND SIMULATION OF ON-CHIP BANDPASS FILTERS
A. T. Kollias, E. D. Tsamis and J. N. Avaritsiotis
333
THE DESIGN OF A RIPPLE CARRY ADIABATIC ADDER
V. PAVLIDIS, D. SOUDRIS and A. THANAILAKIS
337
MAXIMUM POWER ESTIMATION IN CMOS VLSI CIRCUITS
N. E. EVMORFOPOULOS, J. N. AVARITSIOTIS and G. I. STAMOULIS
341
DESIGNING A MICROWAVE VCO 945MHZ WITH COMPUTER AIDED DESIGN SIMULATION
S. PANAGIOTOPOULOS and A. KOUPHOYANNIDIS
345
POWER DISSIPATION CONSIDERATIONS IN LOW-VOLTAGE CMOS CIRCUITS
ALKIS A. HATZOPOULOS
349
Microelectronics Networks/Technology Transfer and Exploitation
EURACCESS: A EUROPEAN PLATFORM FOR ACCESS TO CMOS PROCESSING
C. L. CLAEYS
355
MMN: GREEK NETWORK ON MICROELECTRONICS, MICROSYSTEMS AND NANOTECHNOLOGY
A. G. NASSIOPOULOU
359
TECHNOLOGY TRANSFER IN ACTION
VASSILIOS TSAKALOS
360
SUPPORTING EUROPEAN RESEARCH ALLIANCES IN MICROELECTRONICS THE MINATECH PROJECT
D. A. TSAMTSAKIS
375
SIMULATIONS OF MOLECULAR ELECTRONICS
SOKRATES T. PANTELIDES, MASSIMILIANO DI VENTRA and NORTON D. LANG
380
BACK MATTER
387
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